At ARM's headquarters (in Cambridge, UK) today for the Uniserver plenary meeting.
September 11-12, 2017
At ARM's headquarters today for the Uniserver plenary meeting.
March 1, 2017
Our paper on "Significance-Aware Program Execution on Unreliable Hardware" made it to TACO . Congrats to the team, especially to
Dinos Parasyris.
February 9, 2017
Heading to DAC program committee meeting today at Detroit.
January 25, 2017
Very interesting program at the Third Workshop on Approximate Computing (WAPCO) at HiPEAC in Stockholm.
September 15-16, 2016
Heading to ARM Research Summit in Cambridge, UK showing our latest results on Approximate Computing.And then back to Volos for the beginning
of the Fall Semester.
August 29-September 2, 2016
I will be at FPL in Lausanne, Switzerland to present a paper. Interesting program!
April 17, 2016
I will be in Uppsala, Sweden to co-organize a Workshop on Benchmarks and Metrics for Approximate Computing.
March 15, 2016
Excited to present our research on aytomatic detection of code significance at CGO 2016 in Barcelona.
March 11, 2016
I will be giving a keynote talk at the PP4RE workshop on our research
on Approximate Computing.
February 25-26, 2016
The Uniserver project is about exploiting design margins
in next-generation microservers to reduce energy consumption. Kick-off meeting coming up in Belfast, UK
January 20, 2016
Very interesting program at the Second Workshop on Approximate Computing (WAPCO) at HiPEAC this year.
37 Gklavani Str,
38221 Volos, Greece
Tel, Fax: +30-24210-74704
E-mail: nbellas at uth dot gr
Current Research Interests
An important goal of our research group is to investigate programming models and compilation tools to automate the generation
of new platform architectures. Starting from many-core programming models, we seek to automatically detect the SW/HW boundary,
generate multiple hardware accelerators based on user requirements and system constraints,
and create the appropriate run-time system to dynamically allocate resources and orchestrate data movement.
We are currently investigating the OpenCL programming model as a unified model to express algorithms for parallel platforms and hardware design [fccm11], [hipeac11].
For an older, yet similar approach using stream programming models look at [saahpc09].
This research aims to make hardware platform design accessible to software engineers and IP algorithm developers.
Significance-based computing is a new computing paradigm that exploits uncertainty to design systems that are energy-efficient and scale gracefully
under hardware errors by operating below the nominal operating point in a controlled way. We are working on system software and architectures that
realize the significance-based computing vision in the context of SCoRPiO project.
We are also interested in mapping and optimization of interesting and realistic applications onto modern multi- and many-core systems
such as CMPs, GPUs and reconfigurable logic [fccm09], [ics2009], [icme2010].
Design of SoCs for such applications used to be the focus of my research [icme2003].
Older Research Interests
My earlier research activity involved the study of minimizing power dissipation in processors using compiler and architectural
techniques. It was one of the first efforts to investigate power minimization at such a high level of abstraction
[tvlsi2000_june], [tvlsi2000_dec].